diff -urN linux-2.4.27-bk/arch/sparc64/kernel/itlb_base.S linux-2.4.27-bk-revert-nx/arch/sparc64/kernel/itlb_base.S --- linux-2.4.27-bk/arch/sparc64/kernel/itlb_base.S Fri Aug 13 22:41:02 2004 +++ linux-2.4.27-bk-revert-nx/arch/sparc64/kernel/itlb_base.S Sat Aug 14 19:29:22 2004 @@ -41,9 +41,7 @@ CREATE_VPTE_OFFSET2(%g4, %g6) ! Create VPTE offset ldxa [%g3 + %g6] ASI_P, %g5 ! Load VPTE 1: brgez,pn %g5, 3f ! Not valid, branch out - sethi %hi(_PAGE_EXEC), %g4 ! Delay-slot - andcc %g5, %g4, %g0 ! Executable? - be,pn %xcc, 3f ! Nope, branch. + nop ! Delay-slot 2: stxa %g5, [%g0] ASI_ITLB_DATA_IN ! Load PTE into TLB retry ! Trap return 3: rdpr %pstate, %g4 ! Move into alternate globals @@ -71,6 +69,9 @@ done ! Do it to it /* ITLB ** ICACHE line 4: Unused... */ + nop + nop + nop nop nop nop diff -urN linux-2.4.27-bk/arch/sparc64/mm/fault.c linux-2.4.27-bk-revert-nx/arch/sparc64/mm/fault.c --- linux-2.4.27-bk/arch/sparc64/mm/fault.c Fri Aug 13 22:41:03 2004 +++ linux-2.4.27-bk-revert-nx/arch/sparc64/mm/fault.c Sat Aug 14 19:29:22 2004 @@ -253,7 +253,7 @@ * in that case. */ - if (!(fault_code & (FAULT_CODE_WRITE|FAULT_CODE_ITLB)) && + if (!(fault_code & FAULT_CODE_WRITE) && (insn & 0xc0800000) == 0xc0800000) { if (insn & 0x2000) asi = (regs->tstate >> 24); @@ -404,16 +404,6 @@ */ good_area: si_code = SEGV_ACCERR; - - /* If we took a ITLB miss on a non-executable page, catch - * that here. - */ - if ((fault_code & FAULT_CODE_ITLB) && !(vma->vm_flags & VM_EXEC)) { - BUG_ON(address != regs->tpc); - BUG_ON(regs->tstate & TSTATE_PRIV); - goto bad_area; - } - if (fault_code & FAULT_CODE_WRITE) { if (!(vma->vm_flags & VM_WRITE)) goto bad_area; diff -urN linux-2.4.27-bk/include/asm-sparc64/pgtable.h linux-2.4.27-bk-revert-nx/include/asm-sparc64/pgtable.h --- linux-2.4.27-bk/include/asm-sparc64/pgtable.h Fri Aug 13 22:41:03 2004 +++ linux-2.4.27-bk-revert-nx/include/asm-sparc64/pgtable.h Sat Aug 14 19:32:07 2004 @@ -101,36 +101,35 @@ #endif /* !(__ASSEMBLY__) */ /* Spitfire/Cheetah TTE bits. */ -#define _PAGE_VALID 0x8000000000000000 /* Valid TTE */ -#define _PAGE_R 0x8000000000000000 /* Keep ref bit up to date */ -#define _PAGE_SZ4MB 0x6000000000000000 /* 4MB Page */ -#define _PAGE_SZ512K 0x4000000000000000 /* 512K Page */ -#define _PAGE_SZ64K 0x2000000000000000 /* 64K Page */ -#define _PAGE_SZ8K 0x0000000000000000 /* 8K Page */ -#define _PAGE_NFO 0x1000000000000000 /* No Fault Only */ -#define _PAGE_IE 0x0800000000000000 /* Invert Endianness */ -#define _PAGE_SOFT2 0x07FC000000000000 /* Software bits, set 2 */ -#define _PAGE_RES1 0x0003000000000000 /* Reserved */ -#define _PAGE_SN 0x0000800000000000 /* (Cheetah) Snoop */ -#define _PAGE_RES2 0x0000780000000000 /* Reserved */ -#define _PAGE_PADDR_SF 0x000001FFFFFFE000 /* (Spitfire) paddr[40:13] */ -#define _PAGE_PADDR 0x000007FFFFFFE000 /* (Cheetah) paddr[42:13] */ -#define _PAGE_SOFT 0x0000000000001F80 /* Software bits */ -#define _PAGE_L 0x0000000000000040 /* Locked TTE */ -#define _PAGE_CP 0x0000000000000020 /* Cacheable in P-Cache */ -#define _PAGE_CV 0x0000000000000010 /* Cacheable in V-Cache */ -#define _PAGE_E 0x0000000000000008 /* side-Effect */ -#define _PAGE_P 0x0000000000000004 /* Privileged Page */ -#define _PAGE_W 0x0000000000000002 /* Writable */ -#define _PAGE_G 0x0000000000000001 /* Global */ +#define _PAGE_VALID 0x8000000000000000 /* Valid TTE */ +#define _PAGE_R 0x8000000000000000 /* Used to keep ref bit up to date */ +#define _PAGE_SZ4MB 0x6000000000000000 /* 4MB Page */ +#define _PAGE_SZ512K 0x4000000000000000 /* 512K Page */ +#define _PAGE_SZ64K 0x2000000000000000 /* 64K Page */ +#define _PAGE_SZ8K 0x0000000000000000 /* 8K Page */ +#define _PAGE_NFO 0x1000000000000000 /* No Fault Only */ +#define _PAGE_IE 0x0800000000000000 /* Invert Endianness */ +#define _PAGE_SOFT2 0x07FC000000000000 /* Software bits, set 2 */ +#define _PAGE_RES1 0x0003000000000000 /* Reserved */ +#define _PAGE_SN 0x0000800000000000 /* (Cheetah) Snoop */ +#define _PAGE_RES2 0x0000780000000000 /* Reserved */ +#define _PAGE_PADDR_SF 0x000001FFFFFFE000 /* (Spitfire) Phys Address [40:13] */ +#define _PAGE_PADDR 0x000007FFFFFFE000 /* (Cheetah) Phys Address [42:13] */ +#define _PAGE_SOFT 0x0000000000001F80 /* Software bits */ +#define _PAGE_L 0x0000000000000040 /* Locked TTE */ +#define _PAGE_CP 0x0000000000000020 /* Cacheable in Physical Cache */ +#define _PAGE_CV 0x0000000000000010 /* Cacheable in Virtual Cache */ +#define _PAGE_E 0x0000000000000008 /* side-Effect */ +#define _PAGE_P 0x0000000000000004 /* Privileged Page */ +#define _PAGE_W 0x0000000000000002 /* Writable */ +#define _PAGE_G 0x0000000000000001 /* Global */ /* Here are the SpitFire software bits we use in the TTE's. */ -#define _PAGE_EXEC 0x0000000000001000 /* Executable SW bit */ -#define _PAGE_MODIFIED 0x0000000000000800 /* Modified Page (ie. dirty) */ -#define _PAGE_ACCESSED 0x0000000000000400 /* Accessed Page (ie. ref'd) */ -#define _PAGE_READ 0x0000000000000200 /* Readable SW Bit */ -#define _PAGE_WRITE 0x0000000000000100 /* Writable SW Bit */ -#define _PAGE_PRESENT 0x0000000000000080 /* Present */ +#define _PAGE_MODIFIED 0x0000000000000800 /* Modified Page (ie. dirty) */ +#define _PAGE_ACCESSED 0x0000000000000400 /* Accessed Page (ie. referenced) */ +#define _PAGE_READ 0x0000000000000200 /* Readable SW Bit */ +#define _PAGE_WRITE 0x0000000000000100 /* Writable SW Bit */ +#define _PAGE_PRESENT 0x0000000000000080 /* Present Page (ie. not swapped out) */ #if PAGE_SHIFT == 13 #define _PAGE_SZBITS _PAGE_SZ8K @@ -154,27 +153,16 @@ /* Don't set the TTE _PAGE_W bit here, else the dirty bit never gets set. */ #define PAGE_SHARED __pgprot (_PAGE_PRESENT | _PAGE_VALID | _PAGE_CACHE | \ - __ACCESS_BITS | _PAGE_WRITE | _PAGE_EXEC) + __ACCESS_BITS | _PAGE_WRITE) #define PAGE_COPY __pgprot (_PAGE_PRESENT | _PAGE_VALID | _PAGE_CACHE | \ - __ACCESS_BITS | _PAGE_EXEC) + __ACCESS_BITS) #define PAGE_READONLY __pgprot (_PAGE_PRESENT | _PAGE_VALID | _PAGE_CACHE | \ - __ACCESS_BITS | _PAGE_EXEC) + __ACCESS_BITS) #define PAGE_KERNEL __pgprot (_PAGE_PRESENT | _PAGE_VALID | _PAGE_CACHE | \ - __PRIV_BITS | \ - __ACCESS_BITS | __DIRTY_BITS | _PAGE_EXEC) - -#define PAGE_SHARED_NOEXEC __pgprot (_PAGE_PRESENT | _PAGE_VALID | \ - _PAGE_CACHE | \ - __ACCESS_BITS | _PAGE_WRITE) - -#define PAGE_COPY_NOEXEC __pgprot (_PAGE_PRESENT | _PAGE_VALID | \ - _PAGE_CACHE | __ACCESS_BITS) - -#define PAGE_READONLY_NOEXEC __pgprot (_PAGE_PRESENT | _PAGE_VALID | \ - _PAGE_CACHE | __ACCESS_BITS) + __PRIV_BITS | __ACCESS_BITS | __DIRTY_BITS) #define PAGE_INVALID __pgprot (0) @@ -185,18 +173,18 @@ #define pg_iobits (_PAGE_VALID | _PAGE_PRESENT | __DIRTY_BITS | __ACCESS_BITS | _PAGE_E) #define __P000 PAGE_NONE -#define __P001 PAGE_READONLY_NOEXEC -#define __P010 PAGE_COPY_NOEXEC -#define __P011 PAGE_COPY_NOEXEC +#define __P001 PAGE_READONLY +#define __P010 PAGE_COPY +#define __P011 PAGE_COPY #define __P100 PAGE_READONLY #define __P101 PAGE_READONLY #define __P110 PAGE_COPY #define __P111 PAGE_COPY #define __S000 PAGE_NONE -#define __S001 PAGE_READONLY_NOEXEC -#define __S010 PAGE_SHARED_NOEXEC -#define __S011 PAGE_SHARED_NOEXEC +#define __S001 PAGE_READONLY +#define __S010 PAGE_SHARED +#define __S011 PAGE_SHARED #define __S100 PAGE_READONLY #define __S101 PAGE_READONLY #define __S110 PAGE_SHARED