--- linux-2.4.16/arch/i386/kernel/setup.c	Sat Dec  1 18:27:13 2001
+++ linux-2.4.16-sse/arch/i386/kernel/setup.c	Sat Dec  1 22:49:44 2001
@@ -1281,8 +1281,22 @@
 			break;
 
 		case 6:	/* An Athlon/Duron. We can trust the BIOS probably */
+	                /* Bit 15 of Athlon specific MSR 15, needs to be 0
+			 * to enable SSE on Palomino/Morgan CPU's.
+			 * If the BIOS didn't enable it already, enable it
+			 * here.
+			 */
+			if (c->x86_model == 6 || c->x86_model == 7) {
+				if (!test_bit(X86_FEATURE_XMM, &c->x86_capability)) {
+					printk(KERN_INFO "Enabling K7/SSE support, since BIOS did not\n");
+				        rdmsr(MSR_K7_HWCR, l, h);
+				        l &= ~0x00008000;
+					wrmsr(MSR_K7_HWCR, l, h);
+					set_bit(X86_FEATURE_XMM, &c->x86_capability);
+				}
+			}
 			mcheck_init(c);
-			break;		
+			break;
 	}
 
 	display_cacheinfo(c);
--- linux-2.4.16/include/asm-i386/msr.h	Sat Dec  1 18:27:14 2001
+++ linux-2.4.16-sse/include/asm-i386/msr.h	Sat Dec  1 22:47:05 2001
@@ -81,6 +81,7 @@
 
 #define MSR_K7_EVNTSEL0			0xC0010000
 #define MSR_K7_PERFCTR0			0xC0010004
+#define MSR_K7_HWCR			0xC0010015
 
 /* Centaur-Hauls/IDT defined MSRs. */
 #define MSR_IDT_FCR1			0x107